An electrically erasable non-volatile semiconductor memory using a floating gate electrode has been used as a non-volatile semiconductor memory device. NAND-type flash memory has been known as a representative in the non-volatile semiconductor memory and has been increasingly demanded as a device for storing data. In the NAND-type flash memory, for example, a memory cell transistor in which a width of a lower portion in a floating gate electrode is wider than a width of a portion other than the lower portion has been developed for higher packing density of the memory cell transistor as disclosed in Japanese Patent Publication (Kokai) No. 2006-93327.
As the highest electric field is applied to an upper edge portion of the floating gate electrode, a leakage current of an inter-gate insulating film is increased in the memory cell transistor. As a result, problems such as lowering of writing speed and erasing speed on the memory cell transistor and fluctuation of a stored charge amount are generated. The problems become remarkable when the width of the gate electrode in the memory cell transistor is shrunk to be high packing density.